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Instruction set
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#	Item
211	Porting GCC to the AMD64 architecture Jan Hubiˇcka ˇ s. r. o. SuSE CR, , http://www.ucw.cz/˜hubicka Add to Reading List Source URL: gcc.cybermirror.org Language: English - Date: 2004-08-29 18:00:00 X86 architecture Subroutines Instruction set architectures Assembly languages X86-64 Stack machine Function prologue X86 Processor register Computer architecture Computing Software engineering
212	USING INFORMATION THEORY TO STUDY THE EFFICIENCY AND CAPACITY OF COMPUTERS AND SIMILAR DEVICES Boris Ryabko Institute of Computational Technology of Siberian Branch of Russian Academy of Science Siberian State University Add to Reading List Source URL: sp.cs.tut.fi Language: English - Date: 2010-08-12 11:09:05 MMIX Computer MIX Reduced instruction set computing Assembly language Sequence Instruction set Computer architecture Donald Knuth Computing
213	An Overview of Static Pipelining Ian Finlaysony , Gang-Ryung Uhz , David Whalleyy and Gary Tysony y Department of Computer Science z Department of Computer Science Add to Reading List Source URL: www.cs.fsu.edu Language: English - Date: 2011-08-10 14:26:43 Central processing unit Compiler optimizations Instruction set architectures Classes of computers Software pipelining Instruction pipeline MIPS architecture Reduced instruction set computing Transport triggered architecture Computer architecture Computer engineering Computer hardware
214	Developments in KVM on Power Paul Mackerras, IBM LTC OzLabs Add to Reading List Source URL: www.linux-kvm.org Language: English - Date: 2015-06-23 18:18:00 Virtual machines Instruction set architectures Computer memory Data transmission Endianness QEMU PowerPC Hypervisor Paravirtualization System software Software Power Architecture
215	Information Document Energy Trading System Net Settlement Instructions ID# 2012-xxx(R) Information documents are for information purposes only and are intended to provide guidance. In the event of any discrepancy between Add to Reading List Source URL: www.aeso.ca Language: English - Date: 2013-03-25 13:29:14 Instruction set Business Economics Alberta Electric System Operator Settlement Futures contract
216	Porting GCC to the IBM S/390 platform Hartmut Penner Ulrich Weigand IBM Deutschland Entwicklung GmbH Schönaicher Str. 220, 71032 Böblingen, Germany {hpenner, uweigand}@de.ibm.com Add to Reading List Source URL: gcc.cybermirror.org Language: English - Date: 2004-08-29 18:00:00 Assembly languages Central processing unit Instruction set architectures Addressing mode Machine code Pointer Literal pool Memory address 64-bit Computing Computer architecture Software
217	MCP2210 USB-to-SPI Protocol Converter with GPIO (Master Mode) Features: Package Types: Add to Reading List Source URL: ww1.microchip.com Language: English - Date: 2011-12-14 12:30:49 Non-volatile memory Universal Serial Bus EEPROM Chip select USB flash drive Instruction set architectures UEXT Atmel AVR Computer hardware Microcontrollers Serial Peripheral Interface Bus
218	Reducing the Cost of Conditional Transfers of Control by Using Comparison Specifications William Kreahling Western Carolina University Add to Reading List Source URL: www.cs.fsu.edu Language: English - Date: 2006-04-21 21:30:19 Branch predictor Branch misprediction Assembly languages Instruction set Branch predication Compiler optimization ARM architecture Processor register Classic RISC pipeline Computer architecture Central processing unit Instruction set architectures
219	Improving Low Power Processor Efficiency with Static Pipelining Ian Finlayson† , Gang-Ryung Uh‡ , David Whalley† and Gary Tyson† † ‡ Add to Reading List Source URL: www.cs.fsu.edu Language: English - Date: 2011-01-31 11:18:06 Central processing unit Compiler optimizations Classes of computers Instruction set architectures Software pipelining Instruction pipeline Reduced instruction set computing MIPS architecture Microarchitecture Computer architecture Computing Computer engineering
220	Appears in the Proceedings of 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’12) Architecture Support for Disciplined Approximate Programming Hadi Esmaeil Add to Reading List Source URL: homes.cs.washington.edu Language: English - Date: 2012-01-11 16:58:46 Computer engineering Instruction set architectures Microarchitecture Microprocessors Register file Instruction set DEC Alpha CPU cache Cell Computer architecture Computer hardware Central processing unit

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